soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的,含蓄的
牛津词典
adj.
- 软性色情的;(性描写等)隐晦的,含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的,较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- Implementation of Soft-Core Processor and DDFS Based on FPGA
基于FPGA的软核处理器及DDFS实现 - Design of an Ethernet Interface Based on the Nios Soft-core Processor
基于Nios软核处理器的以太网接口设计 - In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
在实际应用中设计者可以将此软核作为通讯模块通过FPGA实现,或者快速搭建现场总线通信系统,实现灵活的CAN总线接口方案。 - The prototype designs with soft-core processors of Nios II in FPGA, improves the programmability of network processors.
网络处理器芯片原型采用NIOSii软核处理器在FPGA上实现,提高了网络处理器的可编程能力。 - To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
针对实时性问题,提出将内核硬件化设计的思想,将系统的体系结构划分为软核和硬核,硬核作为协处理器管理应用任务,提高系统的实时性,使系统的性能得到明显的提高。 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一,运用了在单芯片上实现系统功能的设计思想,采用了高性能的软核处理器(NiosIICPU)和IP复用技术,提高了整个系统的运行速度和进一步改进的灵活性。 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核,包括运动矢量生成模块、预测处理模块和插值模块。 - Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
采用FPGA作为控制芯片,在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。 - This paper introduces 8B/ 10B encoding technique, and puts forward a simple and practical realization method of an 8B/ 10B encoder. Furthermore, a versatile soft-core designed with Verilog is presented.
本文介绍了8B/10B编码技术,提出了一种简单、实用的8B/10B编码器的实现方法,并且采用Verilog语言设计了一种通用的软核。 - Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
基于NIOS软核CPU技术的多路电话计费系统的设计与实现